Reference Design:Time shift Calculation Inside GPS hardware

Electronics & Electrical Engineering Topics
Post Reply
User avatar
SemiconductorCat
Major
Major
Posts: 455
Joined: Mon Aug 22, 2011 8:42 pm
Location: currently in hyperspace

Reference Design:Time shift Calculation Inside GPS hardware

Post by SemiconductorCat » Sun Oct 28, 2012 4:50 pm

The transmitted code is called "pseudo-random code" because it looks like a noise signal. When a satellite is generating the pseudo-random code, the GPS receiver is generating the same code and tries to match it up to the satellite's code. The receiver then compares the two codes to determine how much it needs to delay (or shift) its code to match the satellite code.
^ Quoted from a previous post.

Does anybody have a design reference for this, please share.
Or some link to a paper which explains this unit's internal inside and out.

Any idea how this done. I think and suppose it's done through an analog calculator by comparing the phrase difference
and feed backing it through a PLL while phase difference is zero. In that method there should be a nasty hack of sigma
delta encoding to encode it back to a digital signal and count it.I just guessed , looking forward for a real reference
design , or any idea how this could be archived?

I have little experience in Mix signal design but these chips are still sounds to like magic box. I hate this magic box
thing. Sooner or later I want to open it. I got interest to do so.


--Thanks in advanced--
User avatar
shezi
Posts: 1
Joined: Tue Jan 29, 2013 11:27 am

Re: Reference Design:Time shift Calculation Inside GPS hardware

Post by shezi » Tue Jan 29, 2013 12:00 pm

I like this forum, amazing and very informative,
User avatar
SemiconductorCat
Major
Major
Posts: 455
Joined: Mon Aug 22, 2011 8:42 pm
Location: currently in hyperspace

Re: Reference Design:Time shift Calculation Inside GPS hardware

Post by SemiconductorCat » Thu Jan 31, 2013 2:07 pm

Upto date I still didn't find the answer. And this kind of question I can't ask in stackexchange either.
Because it's asking for papers or resources are not permitted in stackexchange site(s) which is
dedicated into Q&A style.

Upto date what I reference here and there in google and find out is you could easily use digital PLL for this.
So need that much of analog complex things. But I still lacks a reference design.

something like this what I'm asking,
If somebody ask USB reference design he could find VUSB like thing. If somebody need GSM reference design
he could also find a one I guess.

I think I lacks the fundermantal knowledge behind PLL theory and mathematics. May be that's why I can't understand
those cryptic flow charts there.
Post Reply

Return to “Electronics & Electrical Engineering”